Digital IC Design Engineer at Morse Micro

Digital, Sydney, Australia sydney engineering design
Posted 1 months ago

Are you a digital design engineer with experience in RTL design, synthesis and DFT for mixed-signal chips? Do you want to play a key role in building next generation Wi-Fi chips that will truly enable the Internet of Things? Would you like to make a real difference in a VC-backed startup and work in a dynamic & fun environment? Then join Australia’s fastest growing semiconductor startup based in Sydney, Australia! You’ll work with the team that invented Wi-Fi 20 years ago, and help shape the future of Wi-Fi.

As Digital IC Design Engineer, your role will be within the digital team as a designer and owner of the synthesis and DFT flow, which will involve you running synthesis and performing hand off to the backend team.

Applicants will need to be experienced with digital design for mixed-signal SoCs, DFT and low-power synthesis flows. You will be responsible for the complete RTL to GDSII flow. You will maintain the DFT infrastructure, synthesis scripts and work closely and iteratively with the backend team to ensure best-possible power and performance QoR, and help ensure design correctness through to tapeout. You’ll work closely with the rest of the team on-site to develop the RTL, address implementation challenges and help prepare the digital design for delivery to the P&R team.

Other responsibilities will include working with the digital and analog teams on top-level infrastructure such as clocking, power control and host-interfaces. You will also be involved in bring-up of silicon in the lab and preparation and optimization of the chip for production.

We are willing to sponsor a work visa for overseas applicants. 

Essential skills (you must have):

  • MSc in Electrical / Electronics / Communication Engineering or Computer Science
  • Digital design experience with 8+ years relevant industry experience
  • A deep understanding of digital design fundamentals including low power and multi-clock-domain design for mass-produced, mixed-signal chips
  • Experience with digital synthesis tools targeting low power, mixed-signal applications on modern technology nodes
  • Experience with synthesis tools such as Cadence Genus and/or Synopsys Design Compiler, and developing scripted flows for each
  • Experience analyzing and optimizing a design’s timing and power characteristics through feedback from synthesis and P&R iterations
  • Experience integrating and verifying DFT infrastructure such as logic scan, boundary scan and MBIST using industry standard tools such as Mentor Tessent, Cadence Modus or Synopsys TestMAX
  • Experience with development and debugging of digital designs from RTL design through to SDF-annotated gatesims
  • A good understanding of embedded processor systems, familiarity with RISC-V is a plus
  • A solid understanding of mixed signal ASIC design and simulation, experience with AMS simulation is a plus
  • Hands-on experience with the Cadence or Synopsys simulation suite
  • Hands-on experience with Linux development environment staples such as make, shell scripts and Python

Who we are:

Morse Micro is a fabless semiconductor company building Wi-Fi HaLow (802.11ah) chips for the Internet of Things (IoT). We are a team of wireless experts that love to innovate & invent. Together, we are building the world’s lowest power Wi-Fi technology that will enable billions of IoT devices to connect securely to the internet. 

How to apply:

If you are interested in building the first 802.11ah chip together with the inventors of Wi-Fi, then send us your resume and application letter.If you are an international applicant, please specify if you have working rights in Australia.