Are you an expert digital design and verification engineer with 15+ years experience developing mixed-signal chips? Do you want to play a key role in building next generation Wi-Fi chips that will truly enable the Internet of Things? Keen to make a real difference in a VC-backed startup and work in a dynamic & fun environment? Then join Australia’s fastest growing semiconductor company based in Sydney. You’ll work with the team that invented Wi-Fi 20 years ago, and help shape the future of Wi-Fi.
As a Principal Digital Design and Verification Engineer, your responsibilities will include both top and block level architectural research and implementation, and chip lead duties including design and verification through to tapeout. Ideal applicants will have a broad range of digital design and verification skills and strong industry experience in designing low-power mixed-signal SoCs.
We are open to sponsoring a work visa for the right candidate.
- Chip and block design and verification
- Enhancement of our design and verification infrastructure
- Working across teams to ensure efficient hardware-software co-design and implementation
- Working with, or taking on the role of, a chip lead and assisting with tapeout duties such as system verification, synthesis, ensuring excellent QoR in P&R, gate level netlist simulations to validate design and power intent, and power analysis
- Delivery of large complex projects on time
- Mentoring of junior team members
What we’re looking for:
- Digital design and verification experience with 15+ years relevant industry experience
- MSc in Electrical / Electronics / Communication Engineering or Computer Science
- A deep understanding of digital design fundamentals including low power and multi-clock-domain design for mass-produced, mixed-signal chips
- Expert in mixed signal ASIC design and simulation, experience with AMS simulation is a plus
- Very experienced with the Cadence or Synopsys simulation suites
- Experience with coverage collection tools
- Experience defining functional verification requirements, implementing tests to meet them
- Expert in HDL languages such as Verilog, SystemVerilog or VHDL
- Experience with building complex testbench infrastructures
- Experience running and debugging gate level simulations in post-PnR netlists with SDF annotation, power-aware simulation experience is a plus
- Experience setting up and maintaining continuous integration (CI) flows for regression testing and reporting status
- A good understanding of embedded processor systems, familiarity with RISC-V is a plus
- Experience writing embedded C and structuring code in a way which makes reusability and maintenance a breeze
- Experience with cocotb is a plus
- Hands-on experience with Linux development environment staples such as make, shell scripts and Python
- Experience using the git revision control tool
What we offer:
- Competitive salary + excellent stock option package
- Potential to sponsor a work visa for the right candidate
- Healthy work environment with sit/stand desks and large screens
- Office perks such as stocked drinks fridge, snack bar and barista coffee
- Newly fitted-out offices, with a relaxed, friendly work environment
Who we are:
Morse Micro is a fabless semiconductor company building Wi-Fi HaLow (802.11ah) chips for the Internet of Things (IoT). We are a team of wireless experts that love to innovate and invent. Together, we are building the world’s lowest power Wi-Fi technology that will enable billions of IoT devices to connect securely to the internet. We are a global team with offices in Sydney & Picton (Australia), Irvine & Boston (USA) and Hangzhou (China).
How to apply:
To apply submit your CV and cover letter and tell us why you would be a stand-out applicant for the role of Principal Digital Design & Verification Engineer at Morse Micro.